About SRAM-based FPGA

[lahrach]

Hi friends,

If I want to implement two designs in an SRAM-based FPGA at the same time, how can I do.

In other word if I have two VHDL codes: code _1 and code_2 how can I do to implement then on the same Time.

notes: I use ISE 11.4 and Xilinx FPGAs

Best regards

--------------LF

 

[amraldo]

You have to create a bigger block that takes two instances of the 2 designs.
--
Amr

 

[FvM]

"At the same time" obviously implies using different pins, so simply merge both designs, either in a single top entity or instantiate both top entities as components in a new design top.

 

[velumuruganb]

Are the anyone can tell me , how to define and use Blind and buried vias in Allegro15.7?