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about low current LDO MPC1710 only 20na

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andy2000akimo

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in standard cmos process . how to working in na current ?

I ever try use mos current mirror when bias cureent less < 0.1ua
some die have fail

yield loss ..
even simulation by hspice is ok , but real silicion have fail die

how to design total 20na LDO ??
bandgap need current , OPA also need operation current
 

Perhaps it's not exactly standard CMOS? Could you show the data sheet?
 

MCP1710 , not MPC

MCP1710 Data Sheet - Microchip
ww1.microchip.com/downloads/en/.../25158A.pdf‎翻譯這個網頁
provides high-current and low-output voltages, while maintaining an ultra-low 20 nA of quiescent current during device operation. In addition, the MCP1710 can.
 

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