Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

About high frequency signal drive

Status
Not open for further replies.

Kristya

Junior Member level 1
Joined
Sep 21, 2015
Messages
17
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
160
I am dealing with a 6.4mm2x6.4mm2 array chip, and there is a long high frequency signal line in the chip(about 180MHz, 1um wide ,3.2mm long ,and made of top metal). I want to know if this metal line is ok for the signal transfor, would the signal attenuation happen? If true, how can I consider for correction.

As I now think this metal line should be regraded as transmission line. Is this right?


Thanks for advance.
 

The main effect for your output buffer is the capacitance of the signal line. For an estimation you can use the nearly technology-independent standard value of 0.2 pF/mm , which is valid for global wires of min. size. With this you can estimate its capacitance - and if your output buffer can drive it.

Other considerations imply the impedance of the receiver at the other side of this signal line. Adaption between output buffer, signal line and receiver impedance affect reflection, of course.
 

You may need to consider putting an AC buffer or two in the signal path. Also, shield the line at something > the minimum metal spacing. But small enough that metal fill doesn't get put in between the signal line and shield.
 

Thank you, but some puzzles about your reply. As the receiver end is an inverter, how to estimation the impedance, do you mean the small signal impedance? This line transmits square wave as a clock.

- - - Updated - - -

Thank you, I've done shield to put ground line between this signal line, is this ok?And I don't know tha AC buffer, this line transmits digital clock, is this useful?
 

Well it's not DC! :)

We generally design using AC and DC buffers. DC buffers are sized to keep any signal coupling to it from flipping the signal high or low. AC buffers are sized for signal integrity. Both are technically digital signal lines but up at 1 GHz nothing is really "digital."
 

Thank you, but some puzzles about your reply. As the receiver end is an inverter, how to estimation the impedance, do you mean the small signal impedance? This line transmits square wave as a clock.

In this case the receiver impedance isn't important. Just put several drivers in your signal path, as rangermad suggested.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top