greendraw
Newbie level 4

generate for (i=0;
i want to use "generate"-"endgenerate" construction to instantiate multiply module without typing them all. and i ask you decribe me how i can write description.
so i want to unite same outputs from single-type modules and and if one of this outputs not is '1' then i want choose this module.
i think it must be liike this
i'm a newbie in verilog and don't know how do code correctly. can anybody help me?
i want to use "generate"-"endgenerate" construction to instantiate multiply module without typing them all. and i ask you decribe me how i can write description.
so i want to unite same outputs from single-type modules and and if one of this outputs not is '1' then i want choose this module.
i think it must be liike this
Code:
...
generate for (i=0; i<Count; i= i +1)
begin: mult
unit [i] ( ..., myout[i]);
...
if myout[] == b"1...11" then
allout = VCC;
else
allout = GND;
end if;
end
endgenerate
...
i'm a newbie in verilog and don't know how do code correctly. can anybody help me?