Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

about feedthrough error, need your help

Status
Not open for further replies.

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
i have designded a circuit as the figure shows, VI is the input signal, when S1 is closed, VI transfers to Va, then to Vb through the buffer, when S2 is closed, the signal transfered to VO. the buffer is as the figure shows also, it is a two stage opamp with miller compensation, the period of S2 is 10MHz, the DC gain of the opamp is 86dB, GBW is 72MHz, then, my question is: when CTRL (that is S2) goes high, the signal VO has a jump of 50mV or so, however, when CTRL is always high (that is, the opamp works all the time), and when S2 is closed (that is, goes high), the jump is very small, less than 0.2mV. why? what is the reason? how to solve this problem? please help me, thanks all in advance.
 

dick_freebird

Advanced Member level 5
Joined
Mar 4, 2008
Messages
7,508
Helped
2,169
Reputation
4,344
Reaction score
2,056
Trophy points
1,393
Location
USA
Activity points
60,037
Charge injection from the S2 FETs is sucked up when the op amp
feedback includes CL. When CL is detached from the op amp no
means of restoring the voltage exists.

Charge cancellation helps to first order, but the effectiveness
varies across common-mode voltage as the two (if CMOS)
switch FETs' delta Vgd varies with Vcm, and their summed gVgd*Cgd.
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
CL is in the node of VO, not in the output of the buffer (this may be a mistake here, sorry), but what is the meaning of 'vcm' as you said?

besides, any other solutions or ideas, please?
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
everyone, how to solve this problem, please help me, i'm really cofused about this. thanks all.
 

stefannm

Member level 1
Joined
May 9, 2009
Messages
39
Helped
8
Reputation
16
Reaction score
2
Trophy points
1,288
Activity points
1,530
As dick_freebird said the problem is charge injection.

For a circuit like this, I would use a pmos switch in series with your current mirror instead of pulling down on the gate of your mirror. If you put it on the supply side, it will reduce the coupling capacitance to VO. Also, make this switch short channel as you can to reduce its capacitance. If the charge injection is still too high, use a charge cancelation technique as well. You should be able to make the effect pretty insignificant if you do these things.

stefannm
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
yes, i have changed the position of transisor CTRL to be in series with the current mirror, but the charge injection is still very high (larger than 30mV), why? what is the charge cancelation technique? how to realize this in detail? can you speak more clearly, please? thanks.
 

stefannm

Member level 1
Joined
May 9, 2009
Messages
39
Helped
8
Reputation
16
Reaction score
2
Trophy points
1,288
Activity points
1,530
Are you leaving Vp at the proper bias votage? 30mV seems a little high to me.

What is your load capacitance? The bigger your load cap, the less change you should see. Unless I am missing something.

The on/off switch device should be as small as you can make it to reduce coupling cap to your output node.

Here is an interesting pdf on charge injection:
https://www.ece.cmu.edu/research/publications/1989/CMU-ECE-1989-016.pdf

Most CMOS text books have some treatment of the subject.

stefannm
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
any other solutions or advice, please? i really don't know how to solve this problem, thanks all.
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
in my opinion, charge injection occurs when the switch is off, but in my circuit, the voltage jump occurs when the switch is on, so, i think it is not the problem of charge injection, am i right?

besides, what is the reason of this voltage jump (30 mV or so)? and what technique or method can be used to decrease or remove this voltage jump?
i'm really very confused, and i need to solve this problem as soon as possible, please help me, everyone, thanks all in advance, thanks.
 

stefannm

Member level 1
Joined
May 9, 2009
Messages
39
Helped
8
Reputation
16
Reaction score
2
Trophy points
1,288
Activity points
1,530
I took another look at the circuit. A couple things I would try.

1. Delay the turning off of your output stage of the opa until after the opening of S2. A couple inv. delays should be fine.

2. Add a charge injection cancellation switch to compensate for charge transfer from S2. See the image.

stefannm
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
i have tried the mothod as stefannm said, but i does not work. as i said above, charge injection occurs when the switch is off, but in my circuit, the voltage jump occurs when the switch is on, so, i think it is not the problem of charge injection, it may be the problem of feedthrough when S2 (CTRL) is closed, that is, CTRL goes high from low, when CTRL goes high, it has a feedthrough effect on node Va, not Vb, so, i increased the value of the sampling capacitor, and decrease the size of CTRL transistor in the opamp, it improves a little, but it still has an error of 5mV or so. the sampling capacitor cannot be too large in my circuit, so the improvement is limited. then, any other ideas or advice or suggestions? thanks all. please help me again. thanks all.
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
can anyone help me, please? how to decrease or remove this feedthrough effect? i really need your help, thanks all.
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
can anyone help me, please? how to decrease or remove this feedthrough effect? i really need your help, thanks all.
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
can anyone help me, please? how to decrease or remove this feedthrough effect? i really need your help, thanks all.
is there any advice or idea?
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
has anyone met this problem before, please give me some advice. thanks.
 

lhlbluesky

Banned
Joined
Mar 30, 2007
Messages
558
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Location
china
Activity points
0
has anyone met this problem before, please help me. thanks.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top