Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

about clock generation

Status
Not open for further replies.

kannan2590

Member level 4
Joined
Sep 1, 2012
Messages
77
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
india
Activity points
2,321
in xilinx 9.1 i have used Single DCM to generate 120 MHZ frequency clock. from this i want to generate 5MHZ , 2.5 MHZ AND again 120 MHZ CLOCKS from this main 120MHZ clock. the raising edges of all the clocks generated should match .IS there any tecjnique in DCM itself so that we can generate 5MHZ , 2.5 MHZ clocks and 120 MHZ so that the raising edges of all the 3 clock generated are at the same instant.
 

BradtheRad

Super Moderator
Staff member
Joined
Apr 1, 2011
Messages
13,792
Helped
2,733
Reputation
5,462
Reaction score
2,645
Trophy points
1,393
Location
Minneapolis, Minnesota, USA
Activity points
102,946
Don't know about the equipment you're using, but just to give some kind of answer...

You can count every 24 cycles to generate a 5 MHz clock from 120 MHz. But it will not be easy to keep count of each pulse, while your code is doing other things.

Suppose you were to make a frequency divider from hardware?

------------------

The link below is to a Xilinx discussion about multiplying the frequency. There are likely to be threads about dividers.

http://forums.xilinx.com/t5/Spartan...x-and-4x-clocks-using-a-single-DCM/td-p/15977
 

barry

Advanced Member level 5
Joined
Mar 31, 2005
Messages
4,986
Helped
1,090
Reputation
2,190
Reaction score
1,074
Trophy points
1,393
Location
California, USA
Activity points
27,288
When you say the edges line up at the 'same instant' do you have tolerance? If not, then you are out of luck. Maybe you can explain your requirements in a little more detail. Could you, perhaps, use clock enables that occur at the 2.5 and 5MHz rates and use the 120Mhz clock for you registers?
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top