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A quick NAND question

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dhaval4987

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So I had this interview in which they asked:

How do you use Nand as an inverter?
Ans: Short both the inputs.

Q: How about one i/p has normal signal and the other one to Vdd?
A: Yes, that also works.

Q: Of these- which has minimum delay?
A: (I guessed)... the 2nd one has smaller stack from Vdd to ground. so less R and C. [Is this correct???]

Q: Comment on their power.
A: I could not!

Answer me plz!
 

kabiru

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Hey try this link my be you will have your answer.
kpsec.freeuk.com/gates.htm
 

dhaval4987

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Kabiru- I know about gates and how one can substitute using Nand.

My question is about comparision of inverter made by 2 different ways using Nand gate. Which one sees minimum delay and which one is better in terms of power? Why?
 

lostinxlation

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Which is faster depends on how the inputs are used. Suppose N1 as the nmos at the bottom of Nmos stack, and N2 on top of that and assume all the input arrives at the NAND at the same time.

When connect VDD to the input, there are two ways. One is connecting VDD to N1, and nother is connecting VDD to N2.
Comparing the former to the one in your answer, there is no speed difference,but the latter is faster than the one in your answer.

And connecting the input to both pins of NAND doubles the input capacitance, which makes the circuit switch slower.
 

dhaval4987

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@lostinxlation,

yes, i said that the one with VDD is faster than both connected to the input.

How about power dissipation?
 

krishna1234

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in power dissipation i think the second one will dissipate more compared to the first one because it always connected to vdd so there must be always a minimam level of power dissipation even when the input is zero.
 

dhaval4987

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yeah it kind of make sense! thats what i could not answer...
 

dhaval4987

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oh i see!
btw does shorting both input make it less power hungry?
 

Audioguru

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Cmos logic has a threshold voltage at half the supply voltage. If you connect both inputs of a NAND Cmos gate together then the threshold voltage is changed.
Connect one input to the positive supply to correctly convert a cmos NAND gate into a logic inverter.
 

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m.mokhtar

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Hi,
the delay time is controlled by the route of the input till it reaches the output which is you will get the same delay time using both ways
 

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