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A question on simple ESD

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bigworm

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esd mos capacitor

Hi, guys,
my esd problem is about the large capacitors between power rail and ground.
as you know, when positive voltage comes, it needs large caps between power and gnd for discharge electrons
so, is it a good choice to use MOS cap since mos cap has greater unit caps than MIM?
but I am afraid the high voltage spur will distroy the oxide of MOS and lead to failure. will that happen?

thank you.


B.W
 

simple esd protection

Is the capacitor your problem? Is it a filtering capacitor?

You could use a diode in reverse?
 

For power rail based ESD protection u should to pay attention to RC based clamp circuits. During ESD event their circuits behave like large capacitance.
If u need on-chip decoupling capacitor the MOS capacitors has serious drawback, it can suffer from gate oxide reability problem.

Many book about ESD protection freely avalabile on the forum.
Look for one of them:
Sanjay Dabral, Timothy Maloney - "Basic ESD and I/O Design"
 

for power supply based ESD take a look at diode and clamp based ESD protection circuitry....
 

Is the problem the gate oxide of the mos capacitor.
I hope you have a stdtie digital cell.If you are using PMOS as the cap you could connect the gate to the vss vis the stdtie and the drain, source and bulk to the vdd supply.
Also your chip would have pads for esd protection.
The power rails as such go to such a large area of diffusion that the esd enery can easily get distributed.
 

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