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a question about transformer

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sxb416

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when we use ethernet phy chip,we use a isolation trasformer between the chip and cable,the tranformer has a ct pin.
the ct connnet vdd or gnd,but the baseline of the waveform from the transformer is vdd ,gnd or another value??
if it is vdd how the chip work when the value of the waveform extend the vdd??
 

FvM

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See also my answer to your cross posting. Generally, some PHY transceivers are designed for Tx pins swinging above Vdd. Usually the chip technlogy's voltage capability sets a tight limit. So you'll find e.g. a series resistor at the center tap to lower the voltage level (with SMSC PHYs). As mentioned before, the answer is in the datasheets.
 

sxb416

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thank you very much.
I want to design a 100M ethernet phy,
I want to know how i deal with the input singal, so I ask the question.
I hope anyone can help me about it .
 

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Please consult the datasheets of existing PHYs, the can give you a good impression, how they handled the said problems. Generally, Rx is usually connected to a differential amplifier. It needs 100 ohm termination, some chips use a signal attenuation. They mostly have a capacitor at the center tap to short common mode interferences and achieve a well balanced signal. The bias is set chip internally.

The Tx driver is usually an open drain differential current source. It also needs 100 ohm (respectively 2x50) termination according to the ethernet spec. If not limited by protection diodes, the outputs can swing above Vdd. As said, it's mostly a problem of maximum voltage in the respective technology. In any case, the center tap must be connected to a positive voltage to supply the output current, but the voltage may be lower than Vdd.

Stop cross postings! as https://www.edaboard.com/viewtopic.php?t=365696#1192714 Add new questions to the existing thread.
 

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