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A question about this OPA

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wjxcom

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Hi, all: this is a three stage OPA, now I have a question:

please look at the OPA in the attachment, In this OPA, when we design this OPA, we assume the third output voltage swing is 0.5v-4.5v.

But if we assume the output voltage swing is 0.5v-4.5v, how to confirm the voltage swing of the second stage? or say, what is the best value of the voltage swing of the second stage?
 

nxing

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What's the power supply? Actually, the output swing of second stage should be (0.5+VthQ8) - (4.5 + VthQ8).
 

wjxcom

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Hi, nxing: the power supply is VDD. In fact, the source of Q10,Q11,Q5,Q6 connect the VDD.

I think I can try to design this OPA by using the output swing of second stage is (0.5+VthQ8) - (4.5 + VthQ8).

Regards!
 

avlsi

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u can find a similar circuit in
Analog Integrated Circuit Design by Johns and Martin.

The chapter is "Adavanced Current mirrors"(p. 256)
 

montage2000

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in fact the last stage is a source foller, so the second stage outpiut is VGS high than the last stage
 

pillar_chen

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is the thired output stage source follower?
 

iamxo

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montage2000 said:
in fact the last stage is a source foller, so the second stage outpiut is VGS high than the last stage

yes, the third part is a source follower, so the output swing of this stage will not reach 4.5v, I think it is not right. maybe much lower than 4.5V.
 

pfd001

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How about the power supply voltage? which process did you use? Maybe the bulk of your nmos can't be connected with the source.
 

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