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A question about PIC program

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delay_loop

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Code:
movlw 0x20
         movwf file_A, file_B
Loop :nop
         nop
         nop
         decf fileA,F,fileB
         bnz Loop
I just start learning PIC. Below are some questions I want to ask.
To find the time delay of this code,
I want to ask is every instruction(eg. nop) execute in one instruction cycle?
Also I want to ask why there are two file registers in (movwf file_A, file_B) ? Does it mean move the literal in WREG to two file registers(file_A and file_B)?
Thank you for your help.
 
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Colbhaidh

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Not all instructions execute in one cycle - you can get the number of cycles for each instruction in the data sheets.

Now there is something strange about the file_A, fileA, file_B,fileB notation.
Depending on what PIC you are using the SRAM is accessed by bank switching. So to access a RAM location, the PIC op-code can access only FF (256) bytes. But the chip may have many more bytes than this, so it you want to access RAM at 1FF you first load the bank register with 1, then read or write to FF. If you want to access 3FF, load the bank register with 3 then read/write to FF.
There is a mode for accessing the lowest RAM locations 0000 - 00FF that bypasses the bank register since it is not necessary. This save code space since you do not have to first, load the bank register with zero. This is called ACCESS mode. Using the bank register is called BANKED mode.
The assembler syntax is
movwf value, ACCESS sometimes written movwf value,a or even movwf value,0
movwf value, BANKED movwf value,b movwf value,1

So file_B and fileB refers to banked or access mode but no way to tell from the above code.
 
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