a question about pad layout

[mappycarol]

There's a DRC rule in UMC13 pad layout:
The minimum metal space between two pads is 6 um while the min space between the pad metal and core circuit metal is 10 um. Why ?

I appreciate your help.

 

[mappycarol]

Please help!

 

[srivatsan]

I posted a similar topic somehwere here ...

anyways, bondpad when deposited will cause stress on the Si. This stress does adversly affect the characteristics specified for any material in the chip.... I am not sure wheter any EM plays some role or not.. nevertheless it is better to keep it away unless and until fab comes back and says .. you can do CUP (Circuit Under Pad)..

The importance of metal layers behind the pad is to give "cushion effect" when bondpad is deposited.. you dont use that metal for circuit purposes (generally)...

This is same irrespective of any process....

Hope it helps...

Srivats