A question about bandgap reference!

[caosl]

hi, all:
I have designed a bandgap reference,the structure which i adopted is traditional,namely, the opamp's output is connected to two pmos's gate to adjusted the current. Now, the output voltage is change 1.2mv in the range of -40-->125,the startup circuit is ok. The only problem is the overshoot and undershoot is too large(200mv)when add a unit step(1V) on supply voltage,but the static accurancy(line regulation) is very well(20uV/V).Addtionally,the opamp's unity gain bandwidth is 5M,DC gain is 80dB, phase margin is large than 60.In my opinion, this opamp's performance is meet to bandgap reference's requirement.Please help me to reduce this overshoot(undershoot). Any advice is welcome.Thanks a lot!

 

[Fom]

I think your startup circuit gives additional current during 1V step and as a result you get overshoot.

 

[elbadry]

Do you mean the Opamp's phase margin? Or the phase margin of the whole loop?

 

[ipsc]

Do you mean, you are adding 1V step to your operating/typical supply voltage? If so did you check
your opamp's gain at that voltage (supply+1V)?

By the way, what is your supply voltage and why do you want to add 1V step to your operating supply voltage?
How many stages does your opamp has?

 

[caosl]

Thanks all the friends to reply to my question.
The problem i stated above have been resolved.I added a capcitor between power supply line and the output of opamp, in this way, the voltage at two pmos transistor's gate will not be so sharp, additionally, i reduced the total capacitance at the opamp's output node to alleviate it's burden to charge and discharge.Now,the overshoot is below 5mV.
The reason i add a step change at power supply is that i want to see the line regulation of this bandgap.Because in some applications,this performance is very important. The opamp stage i adopted is one stage folded cascode.

 

[eezou]

Thanks all the friends to reply to my question.
The problem i stated above have been resolved.I added a capcitor between power supply line and the output of opamp, in this way, the voltage at two pmos
transistor's gate will not be so sharp, additionally, i reduced the total capacitance at the opamp's output node to alleviate it's burden to charge and
discharge.Now,the overshoot is below 5mV.
The reason i add a step change at power supply is that i want to see the line regulation of this bandgap.Because in some applications,this performance is very important. The opamp stage i adopted is one stage folded cascode.

How to choose your capacitor size?

 

[bluesmaster]

put a C from the output of OP the vdd is a good way. another tip is the psrr of the op should not be to high. so when the output is connect to the current mirror . the whole pssr can be improved.

 

[caosl]

bluesmaster's comment is correct, the opamp's psrr need not to be very high, the fully-differential to single output's current mirror should at the up,by this way,the psrr of whole bandgap circuit will be increase!