A problem in memory design

[hnejati]

I am designing a complete flash memory block and I have some problems Is there any person here who has some eperiances in this field
every help is appericiated

 

[Iouri]

What problems are you expiriencing?

 

[hnejati]

I have problem about the sectorization of flash memory how can I do that
and about the enable signals how can I design a circuit to enable a signal is latch circuits appropriate
I want the answer in mos level
and about the last layout what is the best layout
I have done it block by block but at last how can I arrange them to have the min area on chip
thanks for help

 

[Antonios]

can U get more detail to be able to help U.
1- what final size of U'r flash.
2- what is IC that U use.
3- who which access this Flash (Microprocessor,microcontroller,...)

 

[hnejati]

this is a flash memory IC with Data bus address bus CE OE WE VCC GND pins
I designed current sense, Output Buffer,Charge pump, layout for arrays with min chip area (NOR) but I must erase the sector or block simultaneously but I have no idea for erase procedure there is this problem.
technology is: TSMC 0.18um model
chip area as small as possible
a memory chip without any interface

 

[papu]

1- what final size of U'r flash.
2- what is IC that U use.
3- who which access this Flash (Microprocessor,microcontroller,...)

 

[hnejati]

as small as possible
you mean which foundary?
micro controller