A large FSM or severl small FSM: which is better?

[spriteice]

Hi guys,

I have one question about FSM implementation using VHDL.

For my project, I can choose to implement a large FSM which contains around 30 states, or I can choose to implement it by 3 smaller FSMs.

Does the synthesizer prefer the latter solution or the large-but-all-in-1 FSM architecture (I am using Synplify Pro)?

From the performance(Resource Usage, max Frequency) point of view, which one is better then: the Large FSM or the small FSMs?

Thanks

 

[Black Jack]

1) 30 states = 12 (1st FSM) + 8 (2nd FSM) + 10 (3rd FSM)
= 4 + 4 + 4 = 12 Flip-Flops (if you split big FSM)

No split - only 5 FF!

2) And what about recovery from illegal states
in splitting FSM? In one FSM it`s more easy.

 

[maestor]

30 states...

that's a lot.

I've never came across such a big FSM, I normally reduce the number of states to minimum using counters and nested 'if' on them, depends on the design though.

From 12 to 5 FFs, who cares? I guess in these figures the FFs used to encode your FSM are irrelevant.

The choice depends on how complex it's your logic in the states. I wouldn't like to have an FSM that big, I would rather 3 FSMs, but being careful of negotaition between them.

-maestor

 

[spriteice]

Thanks Black Jack and Maestor for your suggestions.

Actually due to speed issue, I will use one-hot FSM . So I think 1 large FSM will use the same amount of registers as 3 FSMs. A 30 State FSM is really too big so probably I will adopt the 3 FSMs architecture.

I agree with Black Jack about the illegal state problem. So the next question is how to ensure the proper work flow of the 3 FSMs.

The current negotiation among these 3 FSMs is very simple:

Start FSM1(from other entity) ---> FSM1 ---> Start FSM2(from FSM1) ---> FSM2 ---> Start FSM3(from FSM2) ---> FSM3 ---> Finish(to other entity)

Each FSM will go back to Idle state after each run.

So any recommendations/advices, guys?

Another question to Maestor:

I have done some test on a FSM using a large number of states and a a FSM using the counters(as you mentioned). But I found the latter one will take much more resources(I use Synplify Pro). What do you think?

 

[cawan]

The design model of multiple small fsm is always better than a huge fsm according to the consideration of timing and resources consumption.

 

[maestor]

Hi spriteice,

I agree with you there, using extra counters and 'ifs' to reduce the number of states in your FSM will increase your logic. I guess it just depends of your design. Personally. I am quite reluctant to FSMs with a lot of states...as you said the more the number of states, the easier to get in illegal states.

-maestor

 

[ADU_adu]

Small FSM is easy to set up.