I need help to design a free-run oscillator in my CMOS design. The oscillator frequency can be anything (ideally, 1MHz), but it has to be relatively stable (let's say 10%) across all the PVT corners. Is it possible? What sort of architecture should I use? Thanks.
Relaxation VCO may be suitable.
The frequency of it is detemined by the current, charged capacitor and Vref.
These are all relatively stable with PVT
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ebuddy said:
I need help to design a free-run oscillator in my CMOS design. The oscillator frequency can be anything (ideally, 1MHz), but it has to be relatively stable (let's say 10%) across all the PVT corners. Is it possible? What sort of architecture should I use? Thanks.
Hi,
A R-C Relaxation Oscillator is the solution. To get variation across process less than 10%, u have to go for trimming. U can either trim current or capacitor. Current trimming is the simplest.
Hi,
A R-C Relaxation Oscillator is the solution. To get variation across process less than 10%, u have to go for trimming. U can either trim current or capacitor. Current trimming is the simplest.
Hi,
A R-C Relaxation Oscillator is the solution. To get variation across process less than 10%, u have to go for trimming. U can either trim current or capacitor. Current trimming is the simplest.
Hi,
1pf is ok, u can go for lesser value also upto 500fF. Only thing is for the given frequency, if u use higher cap, u have to spend more current to charge. So lesser the cap, lesser is the current needed, assuming good process like TSMC or UMC. It depends on ur current spec. Also, its not advisable to use caps below 300fF, because junction capacitors will affect the performance.