therash09
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I wish to discuss a few points about Margins of a RAM, and Process and Extraction Corners...
MARGINS:
What I know thus far is that we normally analyze an SRAM through three types of Margins, viz. Standby SNM, Read SNM and Write Margin. From my understanding of these:
-> Standby SNM is the SNM of the SRAM cell when it is retaining data or in hold state. It is a measure of the extent spurious signals like external radiation, leakage, etc. that the cell can tolerate without filpping state.
-> Read Margin is the SNM during Read operation. Here the source of noise is actually the access transistors, which tend to increase the 0 node through their drive capability. To reduce it, we reduce the access drive power by reducing WL voltage.
-> Read NM = Read Margin _ Stadby SNM, since spurious signals are omnipresent.
-> Write Margin is the maximum voltage that a bitline is to be dropped to change the state of cell. It is in direct conflict with SNM. An SRAM having high SNM has low Write Margin and vice versa, since the data that we Write to a cell is kinda noise trying to alter cell state.
This is all I know about Margins regarding a RAM or an SRAM to be specific. Are the explanations given by me correct? Are there any other margins related to RAMs?
PROCESS CORNERS:
There are these 3 process corners, viz. Slow/Min, Fast/Max, Typ/Nom. These are characterized by drive current, and hence carrier mobility and threshold voltage.
-> Slow Corner: High Vt, small drive current, low carrier mobility, big operational delays, normally occupy much area.
-> Fast Corner: Low Vt, large drive current, high carrier mobility, small operational delays, normally occupy lesser area.
-> Typical Corner: Nomial Vt, drive current, carrier mobility, operational delays, area occupation. It is the desired point of the lot, with Slow and Fast being extreme permissible deviations.
If I am wrong here, please correct me.
EXTRACTION CORNERS:
There are several RC extraction corners, viz. RCmax, RCmin, Cmax, Cmin, typ. Each of these is a result of different R and C corners.
-> RCmax: An extraction corner where conditions are such that R is max and C is max. There may be common parameters influencing the two, like dimensions, etc. So, when R is max-ed, C is min-ed and vice versa. It is therefore an Rmax followed by Cmax.
-> RCmin: An extraction corner where conditions are such that R is min and C is min. There may be common parameters influencing the two, like dimensions, etc. So, when R is min-ed, C is max-ed and vice versa. It is therefore an Rmin followed by Cmin.
-> Cmax: An extraction corner where C is kept max and R is kept typical. This is possible only through independent parameters controlling R and C, such that R is kept typical whilst C surges towards max corner.
-> Cmin: An extraction corner where C is kept min and R is kept typical. This is possible only through independent parameters controlling R and C, such that R is kept typical whilst C surges towards min corner.
-> Typ: Here both R anc C are kept typical.
I'm afraid I maybe wrong here. Kindly correct me if such is the case.
LAST DOUBT:
I'd also like to know the differences between SPICE, DSPF and SPEF RC extraction formats. I've gone through them and found SPICE and DSPF very similar, except that while SPICE mentions some ports(device connected, I guess) as D/S/B/G, DSPF shows them as just any other port, namning them as it does to any other port. SPEF was totally different, with an altogether different format.
I'd be very grateful if these doubt are clarified. It is extremely difficult to find basic information regarding such topics on the Internet and I would not like to carry them further and affect any further understanding of topics related to them.
Thankyou.
MARGINS:
What I know thus far is that we normally analyze an SRAM through three types of Margins, viz. Standby SNM, Read SNM and Write Margin. From my understanding of these:
-> Standby SNM is the SNM of the SRAM cell when it is retaining data or in hold state. It is a measure of the extent spurious signals like external radiation, leakage, etc. that the cell can tolerate without filpping state.
-> Read Margin is the SNM during Read operation. Here the source of noise is actually the access transistors, which tend to increase the 0 node through their drive capability. To reduce it, we reduce the access drive power by reducing WL voltage.
-> Read NM = Read Margin _ Stadby SNM, since spurious signals are omnipresent.
-> Write Margin is the maximum voltage that a bitline is to be dropped to change the state of cell. It is in direct conflict with SNM. An SRAM having high SNM has low Write Margin and vice versa, since the data that we Write to a cell is kinda noise trying to alter cell state.
This is all I know about Margins regarding a RAM or an SRAM to be specific. Are the explanations given by me correct? Are there any other margins related to RAMs?
PROCESS CORNERS:
There are these 3 process corners, viz. Slow/Min, Fast/Max, Typ/Nom. These are characterized by drive current, and hence carrier mobility and threshold voltage.
-> Slow Corner: High Vt, small drive current, low carrier mobility, big operational delays, normally occupy much area.
-> Fast Corner: Low Vt, large drive current, high carrier mobility, small operational delays, normally occupy lesser area.
-> Typical Corner: Nomial Vt, drive current, carrier mobility, operational delays, area occupation. It is the desired point of the lot, with Slow and Fast being extreme permissible deviations.
If I am wrong here, please correct me.
EXTRACTION CORNERS:
There are several RC extraction corners, viz. RCmax, RCmin, Cmax, Cmin, typ. Each of these is a result of different R and C corners.
-> RCmax: An extraction corner where conditions are such that R is max and C is max. There may be common parameters influencing the two, like dimensions, etc. So, when R is max-ed, C is min-ed and vice versa. It is therefore an Rmax followed by Cmax.
-> RCmin: An extraction corner where conditions are such that R is min and C is min. There may be common parameters influencing the two, like dimensions, etc. So, when R is min-ed, C is max-ed and vice versa. It is therefore an Rmin followed by Cmin.
-> Cmax: An extraction corner where C is kept max and R is kept typical. This is possible only through independent parameters controlling R and C, such that R is kept typical whilst C surges towards max corner.
-> Cmin: An extraction corner where C is kept min and R is kept typical. This is possible only through independent parameters controlling R and C, such that R is kept typical whilst C surges towards min corner.
-> Typ: Here both R anc C are kept typical.
I'm afraid I maybe wrong here. Kindly correct me if such is the case.
LAST DOUBT:
I'd also like to know the differences between SPICE, DSPF and SPEF RC extraction formats. I've gone through them and found SPICE and DSPF very similar, except that while SPICE mentions some ports(device connected, I guess) as D/S/B/G, DSPF shows them as just any other port, namning them as it does to any other port. SPEF was totally different, with an altogether different format.
I'd be very grateful if these doubt are clarified. It is extremely difficult to find basic information regarding such topics on the Internet and I would not like to carry them further and affect any further understanding of topics related to them.
Thankyou.