Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

a about principle problem (pwm)

Status
Not open for further replies.

junchaoguo51888

Member level 1
Joined
Jun 8, 2003
Messages
38
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
shanghai
Activity points
309
who can answer me the following problem?
i will implement a variable frequency PWM output,
if i apply the direct digital frequency synthesis(DDFS) technology,
is it feasible?
 

complex

It would seem to be complex. You still need to make the fixed pulse width. If you have an analog signal for the frequency it has to run through a ADC to get the bits for the DDS.
 

variable frequency is actually considered PFM, not PWM - your limiting case is 99.9% duty cycle at fmax..

no need for DDFS here, since you are only generating a clock of variable frequency. You can probably use the core circuitry of the DDFS to supply a variable frequency clock to a little PWM system. This may be hard to stabilize at high power output, since the subharmonic problems inherent to PWM will be magnified due to the additional delay in your frequency compensation circuitry.

Try starting with a minimum-off-time PFM, then build PWM into that if it cannot satisfy your requirements.
 

:?: :arrow: my purpose is i must generat a digital
reference signal first ,if i use DDFS generat a signal ,then i can use the signal to generat PWM.
i wonder if it is feasible!
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top