Pont de Pedra
Junior Member level 3
Has anybody suggestions about PME-51?
**broken link removed**
Regards
**broken link removed**
Regards
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Martin Pawloski said:Of course, this new hybrid FJMP instruction is an undefined instruction to any real 8051. If it were allowed to pass through to the 8051, the program would malfunction by jumping to an unintended address. So the PME-51 translates the instruction on behalf of the 8051. When the first byte of the FJMP instruction is read from the program memory, the PME-51 detects that it's an AJMP opcode and takes the following three actions:
1. It takes the three bits of embedded address from the AJMP opcode and loads them into a holding register.
2. It blocks the AJMP opcode and instead outputs an LJMP opcode (002) onto the 8051 data bus. The 8051, upon reading and decoding this LJMP opcode, will read the remaining two bytes of the instruction and load them into its 16-bit PC.
3. The PME-51, upon detecting the end of the instruction, will transfer the contents of the holding register to its eXtended Address Register (XAR) and output these three bits as address bits A[18..16]. These address bits form the three most significant bits of the desired 19-bit target address, while the 8051 outputs the 16 least significant bits.
Pont de Pedra said:Has anybody suggestions about PME-51?