#### Opel_Corsa

##### Member level 1

**8 to 1 mux**

I am trying to write a code for an 8-to-1 mux. Here's what I've got so far:

Code:

```
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity mux8to1 is
port (X: in std_logic_vector(7 downto 0);
S: in std_logic_vector(0 to 2);
F: out std_logic);
end mux8to1;
architecture RTL of mux8to1 is
begin
process(X,S)
begin
if (S=0) then
F <= X[0];
elsif (S=1) then
F <= X[1];
elsif (S=2) then
F <= X[2];
elsif (S=3) then
F <= X[3];
elsif (S=4) then
F <= X[4];
elsif (S=5) then
F <= X[5];
elsif (S=6) then
F <= X[6];
elsif (S=7) then
F <= X[7];
end if;
end process;
end RTL;
```

In the above, X is the 8-bit input, S is the 3-bit switch, and F is the single bit output. I think my question is how to access values within a vector? (in my case, X[0] doesn't seem to be in the correct format)

Also, I don't think something like S=1 is meaningful in VHDL (I use Quartus btw). Is there a way to use decimals instead of binary? i.e. to type S=1 instead of typing S="001"

Any help is appreciated.