haidar123
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Hi Guys
I want to implement SHIFT LEFT Logical on VHDL for Operand A of 4 bits to shift left logical by Operand B steps (Operand B tells us how many bits have to be shifted). Operand A and Operand B are 4 bits logic vectors as inputs. Result output port should have result as 8 bit.Need VHDL code.
Thanks:-D
I want to implement SHIFT LEFT Logical on VHDL for Operand A of 4 bits to shift left logical by Operand B steps (Operand B tells us how many bits have to be shifted). Operand A and Operand B are 4 bits logic vectors as inputs. Result output port should have result as 8 bit.Need VHDL code.
Thanks:-D