borabilgic
Newbie level 6
Hi, I could not find the voltage handling limits of 65nm process mosfets. How high VDD can I apply to a 65nm chip and for how long? Thank you.
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Hi Dick,Pick a foundry and drill into their docs. Core
and I/O devices can vary between flows, and
"how high" depends on things like reliability
expectations and temperature range (the
lower the Leff, the more foundries push on
reliability and apply "use model" limits in
lieu of old fashioned "full temp range, all
the time" reliability rules.