Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

555 Monostable mode - power saving design

Status
Not open for further replies.

tonyctsiu

Member level 1
Joined
Aug 8, 2010
Messages
32
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,541
Dear All,

I am using ICM7555 to generate a pulse at about 10us with some pulse which might be shorter. So I followed the monostable design suggested by the figure 3 of datasheet below:
**broken link removed**

The ICM7555 has power consumption of 200 uA.
However I realized that the Discharge FET is short to ground all the time. That means the current will flow thru RA all the time. If RA = 2000ohm. There will be 500uA wasted on such path.
Do you think it is possible for us to reroute like this
Output->RA->C instead of VDD->RA->C
so that the capacitor is charged by the current from the output pin instead of VDD.
Would there be any issue interms of stability?
 

You can't do that those two component control the lentgh of the output pulse. To reduce current consumption you can lower C and increase RA.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top