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4 to 20mA circuit design

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When the wiper of pot is positioned at its upper limit, let me know the current through the transistor and how you worked it out. I will then explain your mistake.
 

When the wiper of pot is positioned at its upper limit, let me know the current through the transistor and how you worked it out. I will then explain your mistake.
When the pot is at the upper limit the voltage across R3 (and the transistor base to the V+) is about 1.28V. The voltage across R4 from the transistor emitter is then about 0.6V (1.28V minus the base-emitter drop). This generates a current through R4 (and thus through the transistor and RLd) of .6V / 150 = 4mA, the lower current limit setting.

So explain my mistake (which would also be a mistake in the simulation) since you seem so certain there is one. :???:
 

How did you work out the voltage across R3 is 1.28v ?? V+ is 24v
 

I have a picture capture from internet regarding to 4-20mA current circuit..
kindly open this close picture.. and guide me ... View attachment 107436

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the problem is that when I apply this circuit then not get a linear relation e.g at Minimum value of resistance 20mA and at high value its 4mA but in between I'm not getting 8mA, 12mA and 16mA current steps

This circuit topology is a classic current source one, but it require the following changes--

1) replace LM7805/06 with an LM317
2) replace 1K with exactly 62.5 ohms
3) replace 20K pot with a 250 ohm pot.
 

How did you work out the voltage across R3 is 1.28v ?? V+ is 24v
I used 10V in my simulation as is shown on the schematic. I missed his requirement that it be 24V. So the resistor values just need to be changed for that.

Below is a simulation of the circuit revised for a 24V supply. The current changes very little for a RLd variation from 0.01 ohms to 700 ohms.

2-20mA.gif

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This circuit topology is a classic current source one, but it require the following changes--

1) replace LM7805/06 with an LM317
2) replace 1K with exactly 62.5 ohms
3) replace 20K pot with a 250 ohm pot.
But I don't believe that gives the current variation versus pot position that the OP wants.
 
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I used 10V in my simulation as is shown on the schematic. I missed his requirement that it be 24V. So the resistor values just need to be changed for that.

I think there's something wrong in your setup. I get entirely different results !!
Or you could try the (original) current mirror method.... might get better results.

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But I don't believe that gives the current variation versus pot position that the OP wants.

Thats true, it gives a 1/R relationship
 

Hi,

4..20mA are current loop interfaces.
The complete interface only makes sense when the desired output current is independent of voltage (in a wide range).

It seems that the OP is not that experieced, so please be so kind to reccomend only circuits meet 4..20 mA standards.
All the circuits in posts 10, 16, 18, 20, 27 don't fit to a 4..20 mA interface because the are about proportional voltage dependent.
The circuits have about the same function as a simple pot.

Klaus
 

4..20mA are current loop interfaces.
The complete interface only makes sense when the desired output current is independent of voltage (in a wide range).

It seems that the OP is not that experieced, so please be so kind to reccomend only circuits meet 4..20 mA standards.
All the circuits in posts 10, 16, 18, 20, 27 don't fit to a 4..20 mA interface because the are about proportional voltage dependent.
The circuits have about the same function as a simple pot.
The OP wanted a current loop output whose current output is proportional to the position of a pot. The circuit I posted meets that criteria as the output current is determined by the pot position and independent of the output load resistance (and thus output voltage) within its voltage compliance range. That meets basic 4-20mA current loop requirements. That's different than a simple pot whose output current is a function of output load.

My simple circuit does have an output current that is a function of supply voltage so the supply voltage needs to be regulated but I don't see that as a problem.

Why do you say there's something wrong in my setup? What results do you get and how did you get it?
 

i think we've wasted enough time on a poorly designed question. Let's move on folks.

cheers!
 

Hi,

i think we've wasted enough time on a poorly designed question. Let's move on folks.

Yes, you are right. Not we (i), but the op should guide us.

Klaus
 

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