4-stage johnson counter CD4022B (texas instrument)

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hi everybody,
I need a help.
this is circuit for 4-stagge johnson counter circuit. i wonder why they add 2 gates AND & NOR while it could be designed this conventional counter with only feedback and decoder circuit (8 AND gates).


thanks,
 

this is circuit for 4-stagge johnson counter circuit. i wonder why they add 2 gates AND & NOR while it could be designed this conventional counter with only feedback and decoder circuit (8 AND gates).
I believe that's a five-stage Johnson counter.

If you looked up the Johnson counter definition you would understand why it's designed that way.
A Johnson counter never has more than one flip-flop change states at a time, so there are no glitches on the decoded outputs during its state change.
 

hi sorry for missing the correct schematic,
what i mean is the red circle above. For conventional one, there is no such additional logic gates
Could you explain a little more detail?
 

I wouldn't be surprised if those two gates are added to ensure the circuit starts up in a desired state in all devices.
The author may have discovered some outputs appearing randomly high at startup when they ought to be all low. So he installed a workaround to make the circuit behave (simulated or in hardware).

Your own circuit may or may not need the workaround.
 
Those gates are the wrap / carry logic term, the final FF
is the stretched carry bit register. Squint at the bubbles on
those gates and you can see the minor logical difference
to get wrap at '111b or '1001b (4022 octal, 4017 decade).
 

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