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4 bit counter using 2 bit counter

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learning_curve

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hi ,

I need VHDL code...for implementing a 4 bit binary counter from 2 bit binary counters. Basically when the terminal counter of 1st 2 bit binary counter is 11,then the 2nd 2 bit binary counter should start counting.
I understnd tht the o/p if 1st 2 bit counter should go to AND gate whose o/p becomes 1 when 1st counter o/p is "11". The o/p of and gate can act as enable to 2nd counter.

I am not comfortable with the syntax of VHDL hence I need the code.
The architecture of 4-bit counter should be STRUCTURAL where 2 bit counters will be used as components.

thnks
 

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