32 bit barrel shifter verilog code

[SantoshSoundararajan]

hey ! Anyone can help me in writing 32 bit barrel shifter code in verilog ???

 

[gasingh]

What help do you need , in algorithm or in the RTL coding ?

 

[SantoshSoundararajan]

RTL coding.. or any other efficient 32bit shifter to perform left and right shifting ???

 

[gasingh]

RTL coding.. or any other efficient 32bit shifter to perform left and right shifting ???

Hi Santosh ,

What is your target platform , FPGA , ASIC or just Verilog Simulation .

Do you have timing constraints that you have to do this in one clock cycle .

Barrel Shiftier is a combinational circuit which produces a shifted version of the input according to the shift code , and for 32 bit it will be a pretty big one which will restrict your maximum operational frequency because of Setup time requirements, of course you can pipeline it . See this link ftp://ftp.cs.uregina.ca/pub/class/301/guili/BarrelShPipeline.html

If you just want the shift operation to be done you can use verilog shift operator >> and << , but this method can take upto 32 cycles if done unintelligently and in 5 cycles if done in a binary search way (SAR algorithm)


Gaurav

 

[SantoshSoundararajan]

Thanks Gaurav ! that really helped !
I just need a verilog simulation.. i need efficient shifting (right and left) for 32 bits .. Can you give me the code for that ? using binary search ?? We are basically designing high performance 32 bit ALU .. done with multiplier,adder and logic modules.. Confused with shifting.. Please help me out.