250 MHz digital clock

[Evanspronsen]

Hello,

Can some give me a hint how I can make a 250 Mhz stable digital clock.
It is to clock a high speed ADC.

Regards,
Ernst

 

[rfmw]

XTAL based oscillator on 7th+ overton, multiplied to your frequency. Sinewave to LVPECL or any other appropriate levels using high-speed low-jitter logic device (I would recommend ONSemi's NB7L216).

What is your desired clock rms jitter value?

 

[Evanspronsen]

Hi Rfmw,

Thanks for your reaction.
Is it posible to design a 7th overtone Xtal oscillator where don't thave to tinker around to get it working correctly.

The datasheet of the AD9481 says the max Jitter is 0.25 ps RMS

 

[rfmw]

Here is a schematic and a photo of the circuit from commercial RF equipment. Could the XTAL work actually on an 11th or 13th overtone? Didn't have the possibility to measure phase noise (jitter) yet, but I'll do that in the near future.

You could drive the ADC with highest possible amplitude in a differential configuration (using transformer) to get rid of the additional jitter from the logic device.

Hope this helps...