How to measure phase margin through spectre simulation?

[superleaf]

Hi,i don't know how to make a simulation to test the phase margin for the circuit above, anyone who can help me?i have tried to break the point A and B to make the AC simulation,but the result is strange,I don't know the method i did is correct or not?Or is there any other method much better to measure the phase margin?Look forward to your help!

 

[LvW]

Hi superleaf,

the circuit you have shown is a special kind of multi-loop feedback.
If two loops have (at least) one common path, both margins are to be measured/simulated - and the smallest one determines the margin of the circuit.
In your case (it looks as) both loops are independent of each other. Thus - because they are identical - they also have the same loop gain and the same margin. That means, it is sufficient to open only one loop in order to insert a test voltage.
However, this may create some problems because the opamp (I assume it is a vltage-in/voltage-out amp) has no resistive feedback to fix a suitable operating point.
I think, that was the reason for the problems you have encountered. Because of the capacitive feedback I would suggest to simulate the dc transfer curve in order to find the actual offset voltage (for one of the outputs).
Then, apply this offset as a dc input voltage. Now you can open the loop at the output node, inject a test voltage (of 1 volt ac) into the feedback path and determine the output ac voltage. The input without the dc correction voltage has to ge grounded during this test.
This gives you a good approximation for the loop gain response. It is an approximation only (with high frequency errors) because the opened loop does not load the opamp output anymore. But in case of a voltage output this is only a minor problem.

Good luck.

 

[dgnani]

for an accurate simulation look this up in spectre reference manual:
Stability Analysis of Differential Feedback Circuits

ideally you would want to add a common mode feedback amp to stabilize the output common mode. If you don't want to use a complete Tian setup (AC current + voltage injection) consider at least using a symmetric differential stimulus to limit the influence of common mode gain

 

[superleaf]

I'm not sure i have caught your meaning or not,i have drawn a picture here,do you mean we can measure the phase margin using this method in the picture?

Hi superleaf,

the circuit you have shown is a special kind of multi-loop feedback.
If two loops have (at least) one common path, both margins are to be measured/simulated - and the smallest one determines the margin of the circuit.
In your case (it looks as) both loops are independent of each other. Thus - because they are identical - they also have the same loop gain and the same margin. That means, it is sufficient to open only one loop in order to insert a test voltage.
However, this may create some problems because the opamp (I assume it is a vltage-in/voltage-out amp) has no resistive feedback to fix a suitable operating point.
I think, that was the reason for the problems you have encountered. Because of the capacitive feedback I would suggest to simulate the dc transfer curve in order to find the actual offset voltage (for one of the outputs).
Then, apply this offset as a dc input voltage. Now you can open the loop at the output node, inject a test voltage (of 1 volt ac) into the feedback path and determine the output ac voltage. The input without the dc correction voltage has to ge grounded during this test.
This gives you a good approximation for the loop gain response. It is an approximation only (with high frequency errors) because the opened loop does not load the opamp output anymore. But in case of a voltage output this is only a minor problem.

Good luck.

 

[superleaf]

Actually,i have used CMFB inside the diff opamp,so the output voltage of the diff opamp is stable.

for a n accurate simulation look this up in spectre reference manual:
Stability Analysis of Differential Feedback Circuits

ideally you would want to add a common mode feedback amp to stabilize the output common mode. If you don't want to use a complete Tian setup (AC current + voltage injection) consider at least using a symmetric differential stimulus to limit the influence of common mode gain

 

[LvW]

Superleaf, do you have doubts following my recommendation as posted yesterday?
Sorry, but your circuit arrangement (where does it come from?) looks "not very realistic" (to be polite) .
Dc input into the output?

 

[superleaf]

First of all,thank you for your help,yes,i have doubted your recommendation you posted yesterday,you'd better draw a simple circuit connection,and then i can understand much better.

Superleaf, do you have doubts following my recommendation as posted yesterday?
Sorry, but your circuit arrangement (where does it come from?) looks "not very realistic" (to be polite) .
Dc input into the output?

 

[LvW]

I would suggest to simulate the dc transfer curve in order to find the actual offset voltage (for one of the outputs).
Then, apply this offset as a dc input voltage. Now you can open the loop at the output node, inject a test voltage (of 1 volt ac) into the feedback path and determine the output ac voltage. The input without the dc correction voltage has to ge grounded during this test.
This gives you a good approximation for the loop gain response. It is an approximation only (with high frequency errors) because the opened loop does not load the opamp output anymore. But in case of a voltage output this is only a minor problem.

Hi superleaf, I repeat above the most important part of my earlier posting regarding loop gain simulation.
Is it really hard to understand?
By the way, the question of loop gain determination has been discussed very, very often in this forum (and elsewhere).
More than that, there are many contributions in the internet dealing with the subject (key word: loop gain simulation).
Regards
LvW