Effects on digital design

[Angelonut]

Hi everybody,

I have to focus deeply on digital design, in particular on:

1)static and dynamic timing effects
2)analogue effects on digital design

Can you get me some examples of these effects?

Where could I start studying?

Can you suggest me good books on digital design techniques?

Thank you in advance,

Angelo :wink:

 

[yadavvlsi]

Digital circuits switching activity in digital circuit takes place only at clock edge. When design frequency is order of MHz circuit acts digital circuit. But now a days operating frequency has reached in order of GHz mean 10^9 time in a second. So circuit always switching. So one can say it is becoming analogue in nature i.e. it is always switching.

Books for Digital Design:
1.Digital Integrated Circuits by Jan M. Rabaey
2.Cmos Digital Integrated Circuits by Sung-Mo Kang
3.Cmos Vlsi Design: A Circuits And Systems Perspective by Neil H. E. Weste

 

[Angelonut]

Thank you very much for the reply.

I still don't understand what are the analogue effects on digital design. Can you get me some examples?
What about static and dynimic timing effects?

Thanks for the books,

Have a nice day,
Angelo

 

[yadavvlsi]

At such high frequencies (GHz) circuit is always switching. In other words you can say that almost all time it's value is changing. So you can call it analogue nature. As technology is shrinking we are placing components and wires more closer. This increases coupling between adjacent wires. At such high frequencies cross-talk can effect timing badly.
Cross-talk has two effects. 1.Crosstalk delay 2. Crosstalk noise
If if two adjacent wires are switching in opposite direction it will slow down signal hence violating set up time. If two net are switching in same direction it will aid timing. This is called crosstalk delay.This is random phenomenon. It depends on switching.
If one net is switching and other is not switching. The switching one net can cause induce voltage on other net. This is called crosstalk noise.

Clock and signals have finite transition time(rise time and fall time). This comes into picture at high frequencies. No longer you can consider sharp transition. Clock and signal rises slowly and have finite transition time that you need to consider while calculating cell delay.

 

[Angelonut]

Thank you very much!

You are great...your examples are been very clear...but I need your help again to understand better the problems.

Suppose that I want to create a scheme of some effects on digital design, is it right to say that:

1)Static timing effects:
a)gate delay b)net delay c)???

2)Dynamic timing effects:
a)capacitive and inductive crosstalk b)transmission lines c)???

3)Analogue effects:
It's a subset of the dynamic one:
a)clock finite transition b)???

Thanks again,
Angelo

 

[yadavvlsi]

Did you watch this video.? YouTube - Validation. lol :grin: :grin: If not watch this.
You wants to list effects in digital circuits at higher frequencies.???

 

[Angelonut]

Did you watch this video.? YouTube - Validation. lol :grin: :grin: If not watch this.

Wow thank you for the link... I didn't know this video lol I have appreciated it

You wants to list effects in digital circuits at higher frequencies.???

In part...i would understand the differences beetween analogue effects and dynamic effects, and then to make a list of them.

Dynamic --> due to switching activity and so at high frequency ???
Analogue --> also due to switching activity but at high high high high frequency ???