If you're targeting an ASIC, are you seeking a logic device or an analog solution?
(Here I use the word "logic" to mean you care about bi-phase clocks, setup/hold times, bus timing etc., and "analog" to mean radios, mixers, LNAs, filters etc.)
If it's logic you're after, then will something along the lines of an inverter realised from a single (ASIC-able) FET meet your needs? Perhaps the complementary output of your clock buffer/driver? Maybe via a logic family featuring differential signalling (PECL, LVDS etc) driving a single-ended buffer?
If it's analog, then transmission lines, miniature transformers, hybrid/branchline/ratrace couplers, lumped LC/RC/RL techniques would be your friends.