hacksgen
Member level 3
sar adc design
HI guys,
I am designing a 14bit SAR ADC using hybrid architecture. I would like to know about the design of the comparator which is suitable for the following adc specifications.
1) 1.8 volts supply
2) 14 bit resolution
3) sar adc clock speed upto 30 MHz.
4) 0.18u technology.
I would like to know which architecture is suitable considering that the LSB value is about 100µV. Any good resources about designing high resolution comparators. I have searched this forum and am more leaning towards the clock based architecture. I would like to have your opinion regarding possible architectures and the design issues which i should take care of.
Regards,
HI guys,
I am designing a 14bit SAR ADC using hybrid architecture. I would like to know about the design of the comparator which is suitable for the following adc specifications.
1) 1.8 volts supply
2) 14 bit resolution
3) sar adc clock speed upto 30 MHz.
4) 0.18u technology.
I would like to know which architecture is suitable considering that the LSB value is about 100µV. Any good resources about designing high resolution comparators. I have searched this forum and am more leaning towards the clock based architecture. I would like to have your opinion regarding possible architectures and the design issues which i should take care of.
Regards,
