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125MHz MEMS oscillator placement question

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Jester

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6 layer board with QorIQ processor, and 3 ETHERNET PHYs

QorIQ requires a 125MHz clk when using a RGMII interface. I plan to use a fairly small (2.5 x 2mm) MEMS oscillator and can place it very close to the clk input pin, however numerous other high speed signals that are routed on mid layers will have to pass under the oscillator.

From a functional and EMI perspective am I better to get the oscillator close ~ 1cm from destination pin (with other signals below) or place it say 5cm away where no other signals will have to run under the oscillator?

Thanks in advance
 

Any indications that the device itself might be sensitive to external interferences, e.g. from traces below the package?
 

Any indications that the device itself might be sensitive to external interferences, e.g. from traces below the package?

No, but from my limited experience, running signals under a high speed oscillator seems to be frowned upon.
 

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