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# [SOLVED]100uV steps generation

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#### ruby1212

##### Junior Member level 3
I need your advice concerning the possibility of designing a circuit which generates voltage steps of the order of 100uV....A staircase of 100uV voltage steps...I have been trying an integrator based circuit but i am encountering a lot of problems and i am not sure anymore it may lead to obtaining the 100uV steps....Anyone have tried to do this before ? Can anyone recommend any other direction to look into ??!!
Thanks!!

Hello ruby1212,

how many steps do you need?

Regards

Rainer

How many steps do you need to generate?

Typically this would be done with a D/A converter and some associated circuitry.

Well the steps should make a ramp...The dynamic range is 1V peak to peak rfredel..
Yes crustschow this is kind of a D/A...the circuit i am designing increments its output by 100uV if he receives a logic "1" at the input and decrements its output by 100uV if he receives a logic "0" at the input.....Designing a D/A will be complicated and area consuming...that's why i am investigating ways to do it in a "simpler" way....Would that be possible ?

I need your advice concerning the possibility of designing a circuit which generates voltage steps of the order of 100uV....A staircase of 100uV voltage steps...I have been trying an integrator based circuit but i am encountering a lot of problems and i am not sure anymore it may lead to obtaining the 100uV steps....Anyone have tried to do this before ? Can anyone recommend any other direction to look into ??!!
Thanks!!
I don't know your exact requirements, but you can to something like this by switching a constant current source into an integrating capacitor for a very short period of time. If you pick you component values properly, it will produce about a 100 uV change every time you do it. Of course even the best capacitor will have some droop over time. So this will not work if you need static accuracy. But dynamic accuracy could be quite good.

ruby1212

### ruby1212

Points: 2
I have been trying an integrator based circuit

Post #5 sounds as though it is the same thing you've been trying... charging and discharging a capacitor. Also known as a charge bucket.

In the way of a schematic, a simplest possible version might look like this screenshot:

Just to make it easy, the incoming signal is a pwm, to represent a series of highs and lows.

The capacitor charge goes up or down to reflect the preponderance of highs or lows. (The effect is reversed in my setup but that is easy to fix.)

If there are more highs than lows (or vice versa) then the charge level will eventually wander outside your 1V range.

ruby1212

### ruby1212

Points: 2
Well the steps should make a ramp...The dynamic range is 1V peak to peak rfredel..
Yes crustschow this is kind of a D/A...the circuit i am designing increments its output by 100uV if he receives a logic "1" at the input and decrements its output by 100uV if he receives a logic "0" at the input.....Designing a D/A will be complicated and area consuming...that's why i am investigating ways to do it in a "simpler" way....Would that be possible ?
Don't know why you think that's complicated and area consuming. :?: D/A's are readily available as single chips. For a 1V range and 100µV resolution you would need a 14-bit parallel-input D/A chip and a 14-bit up/down counter to generate the A/D control (total of 5 chips).

A D/A will give you a much more stable and precise output then an analog integrator circuit. The D/A will also hold the output stable indefinitely whereas an integrator will drift.

Edit: Or are you trying to design a custom integrated circuit?

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I don't know your exact requirements, but you can to something like this by switching a constant current source into an integrating capacitor for a very short period of time. If you pick you component values properly, it will produce about a 100 uV change every time you do it. Of course even the best capacitor will have some droop over time. So this will not work if you need static accuracy. But dynamic accuracy could be quite good.

Well the ramp should be at least 14 bits linear, and the accuracy of the 100uV steps should be high....It's intended for ADC static test so i guess i need static accuracy,....What do you mean by dynamic accuracy ? like you said the most intuitive way to do so is integrating a constant "small" current into a capacitor for a very short time...but I thought that i won't be able to control the timing to obtain such accuracy....Instead, such accuracy could be obtained by a capacitor ratio (filling a big capacitor with a smaller one via an amplifier)......What do you think about that ? Which way would be more "viable" option ?

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Post #5 sounds as though it is the same thing you've been trying... charging and discharging a capacitor. Also known as a charge bucket.

In the way of a schematic, a simplest possible version might look like this screenshot:

Just to make it easy, the incoming signal is a pwm, to represent a series of highs and lows.

The capacitor charge goes up or down to reflect the preponderance of highs or lows. (The effect is reversed in my setup but that is easy to fix.)

If there are more highs than lows (or vice versa) then the charge level will eventually wander outside your 1V range.

Well this schematic is basically integrating the current sources made by the transistors into the capacitor....like i said in my response to the previous post the problem with this configuration is that the integrating time should be very short in order to make 100uV steps...controlling the timing might not be accurate...and the current source should deliver very small current, of the order of hundreds "pico" ampers if a 1 pico capacitor is used...

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Edit: Or are you trying to design a custom integrated circuit?[/QUOTE]

crutschow, yes, this is a custom integrated circuit....

Well the ramp should be at least 14 bits linear, and the accuracy of the 100uV steps should be high....It's intended for ADC static test so i guess i need static accuracy,....What do you mean by dynamic accuracy ? ...
If you need the output to hold a static voltage indefinitely without any stepping input then forget about the capacitor charging methods. They all droop over time. If you really need an output voltage that is as good as a 14-bit D/A converter then I think you are just going to have to use a 14-bit D/A converter, as has been suggested already. I just don't see how to take advantage of the fact that you will only be changing the digital input by one count at a time to simplify the design any, given your need for static accuracy. BTW, I used the term dynamic accuracy to describe the ability of the circuit to faithfully represent an AC signal without caring about any slow-moving DC offsets.

If you need the output to hold a static voltage indefinitely without any stepping input then forget about the capacitor charging methods. They all droop over time. If you really need an output voltage that is as good as a 14-bit D/A converter then I think you are just going to have to use a 14-bit D/A converter, as has been suggested already. I just don't see how to take advantage of the fact that you will only be changing the digital input by one count at a time to simplify the design any, given your need for static accuracy. BTW, I used the term dynamic accuracy to describe the ability of the circuit to faithfully represent an AC signal without caring about any slow-moving DC offsets.

The output does not need to stay at one value indefinitely...once the ADC has converted the actual output of my circuit the output of this circuit is incremented or decremented another 100uV...For the ADC i am using let's say the output should be maintained constant for at least 20 nano seconds....Do you think the capacitor charging methods are still viable ? what does the extent of the drooping effects depend on ? type of capacitors or what else ?

Why are you building a custom IC for testing an ADC? Normally that's done with off-the-shelf discrete test circuits and instruments.

the integrating time should be very short in order to make 100uV steps...controlling the timing might not be accurate...and the current source should deliver very small current, of the order of hundreds "pico" ampers if a 1 pico capacitor is used...

You would use a 'one-shot' to apply short fixed pulses to the transistor network. You would need a positive-going one-shot for detecting a high. And a downward-going one-shot for detecting a low.

You don't say whether the incoming pulses are fixed length or random length.
You don't say whether it is a regular pulse train, or irregular mix of highs and lows.

My schematic in post #6 illustrates the concept. It would require that you adjust values to obtain your desired operation.

In order to reduce the increments to 100 uV, you would increase the value of the holding capacitor. Or increase the series resistor. Or reduce bias current at the transistors. Etc.

Why are you building a custom IC for testing an ADC? Normally that's done with off-the-shelf discrete test circuits and instruments.

Crutschow, this is intended for a Built-In-Self-Test applications

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BradtheRad, the pulses are fixed lenght, and there might be an irregular mix of highs and lows

My supply voltage is 2.5Volts, and using only one transistor as current source will produce a nonlinear signal "out"...don't you agree with that ? In your schamtic you have a 10V dynamic range and producing a 1V dynamic range linear ramp would be possible with 2 transistor, but i'm afraid a more advanced current source is needed in my case. But I understand the principle you are talking about..

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