Hi, I'm reading papers of VCO which mention 1/(f^3) corner should be reduced to optimize phase noise. But in my opinion,the slope of phase noise lower than 1/(f^3) corner is -30dBc/dec, and the slope of phase noise higher than it is -20dBc/dec. In this case, 1/(f^3) corner should be as high as possible to let phase noise decrease quickly. May I ask where I'm wrong? Thanks.
Hi, I'm reading papers of VCO which mention 1/(f^3) corner should be reduced to optimize phase noise. But in my opinion,the slope of phase noise lower than 1/(f^3) corner is -30dBc/dec, and the slope of phase noise higher than it is -20dBc/dec. In this case, 1/(f^3) corner should be as high as possible to let phase noise decrease quickly. May I ask where I'm wrong? Thanks.
Thanks for the picture. Could you please expain more about "the choice of the common PN reference point of -120 dBc/Hz @ 10 MHz"? And what's the reason that lower 1/f^3 corner frequency has lower phase noise?
In this picture, if I reduce 1/f noise. the corner frequency will shift to left because thermal noise keeps constant. 1/f noise is transformed to 1/f^3 in phase noise domain. Thermal noise is transformed to 1/f^2 in phase noise domain. May I ask if the corner frequency in this picture is the same as 1/f^3 corner in phase noise domain? If they are the same, then I think I can answer my question.
I guess several different ring-VCO + type-II PLL systems with the same phase noise at this reference point have been compared, which have different f -3 corner frequencies. As shown in Fig. 3. (a) of this paper, the phase noise below this reference frequency is lower, as lower the f -3 corner frequency is.