kalpana.aravind
Junior Member level 3
verilog multi-source error 528
Hi All,
I have installed ISE 9.1i free webpack. and running ise 7 tutorial which I downloaded from xilinx website.
while doing synthesize using XST synthesizer, I am getting following error, how to solve the error. Please If any of u have run free tutorial on ise please help me to solve this.
ERROR : Xst:528 - Multi-source in Unit <stopwatch> on signal <hex2led_int1<0>>
Sources are:
Dangling signal <HEX2LED_1/HEX<0>> in Unit <hex2led> is tied to 0 by XST
Output signal of FDCE instance <TENCNT_1/BU2/U0/q_i_0>
any suggestions welcome. waiting for reply.
thanks in advance
Hi All,
I have installed ISE 9.1i free webpack. and running ise 7 tutorial which I downloaded from xilinx website.
while doing synthesize using XST synthesizer, I am getting following error, how to solve the error. Please If any of u have run free tutorial on ise please help me to solve this.
ERROR : Xst:528 - Multi-source in Unit <stopwatch> on signal <hex2led_int1<0>>
Sources are:
Dangling signal <HEX2LED_1/HEX<0>> in Unit <hex2led> is tied to 0 by XST
Output signal of FDCE instance <TENCNT_1/BU2/U0/q_i_0>
any suggestions welcome. waiting for reply.
thanks in advance