butterfish
Full Member level 2
Hi, all,
It's a 32k crystal oscillator with open drain output.
1> when 10K pullup resistor was added, if pullup VDD>3v, it cannot startup, the vpp of x1,x2 are almost 0v, output a random wave.
2> when pullup VDD<3v, it can startup.
3> when removed pullup resistor R1, osc can startup immediately. then, I add R1 back, osc still on.
4> when clock output was set to other frequency, such as 16K,8K, the osc can startup.
this oscillator was used in my products many times, gain, netive-res has no problem.
my question is,
why the opendrain output relate to oscillator startup condition?
if big switch noise of 80/0.7 nch can prevent osc startup, how it works? any threory can help me?
thanks a lot!
It's a 32k crystal oscillator with open drain output.
1> when 10K pullup resistor was added, if pullup VDD>3v, it cannot startup, the vpp of x1,x2 are almost 0v, output a random wave.
2> when pullup VDD<3v, it can startup.
3> when removed pullup resistor R1, osc can startup immediately. then, I add R1 back, osc still on.
4> when clock output was set to other frequency, such as 16K,8K, the osc can startup.
this oscillator was used in my products many times, gain, netive-res has no problem.
my question is,
why the opendrain output relate to oscillator startup condition?
if big switch noise of 80/0.7 nch can prevent osc startup, how it works? any threory can help me?
thanks a lot!