A
ahmadagha23
Guest
Hi friends,
I want to implement a lookup table (rom memory) which comprise 362 cells, each one is 16bits ( so contains 2*181*16=5792bits). I prefer to use CPLD because it do not need any PROM in PCB. Can you suggest me a CPLD from XILINX (for example xc9500) that can implement this lookup table and two (16 bits) dividers and two multipliers?
Is it better to use FPGA (SPARTAN2) or cpld?
thanks
I want to implement a lookup table (rom memory) which comprise 362 cells, each one is 16bits ( so contains 2*181*16=5792bits). I prefer to use CPLD because it do not need any PROM in PCB. Can you suggest me a CPLD from XILINX (for example xc9500) that can implement this lookup table and two (16 bits) dividers and two multipliers?
Is it better to use FPGA (SPARTAN2) or cpld?
thanks