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What's the purpose of C1 and C2 in this circuit?

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devop

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1,Are C1 and C2 are only used for start up ?Do they have any other usage?
2,Is C1 larger or smaller than C2? why?
3,how can I calculate C1 and C2
 

the usage of C here?

what's the function of this circuit?
 

Re: the usage of C here?

Is this a current source ?
If so , maybe C1 and C2 is used for decreasing the effect of noise on
power and ground lines .
 

Re: the usage of C here?

renwl said:
what's the function of this circuit?
I have modifyed the picture:)

to get a non vdd related voltage ref
 

the usage of C here?

it should be a current source generation circuit, C1,C2 are decouple capacitors for noise elimination.
 

the usage of C here?

This is a constant gm current source.Caps are not used for start up here.C1 is a decoupling cap,but C2 will make the psrr much more worse for the noise in the power line will be shorted to the gate of nmos at the high frequency.
 

Re: the usage of C here?

What does the circuit do??

You could think about frequency stabilization. (Besides the usual uses)
 

the usage of C here?

It is used for the noise suppression.....

regards,
$ujith
 

Re: the usage of C here?

This is the Vdd independent biasing circuit. It should have a different startup circuit. The only reason I can think of to have those caps is for noise suppression as this circuit will be used for DC biasing.
 

Re: the usage of C here?

capacitor used for filtering the noise,
 

the usage of C here?

C2 make the PSRR+ worse;C2 also filter the noise
how can I balance it?
another question, how can I calculate it?
if connect C2 to the gnd,is there any difference?
 

the usage of C here?

If C2 connect to gnd ,I thik it will work too.
 

the usage of C here?

some text says that this structure can also provide a PTAT current,can anyone explain?
thanks
 

Re: the usage of C here?

niezimei said:
This is a constant gm current source.Caps are not used for start up here.C1 is a decoupling cap,but C2 will make the psrr much more worse for the noise in the power line will be shorted to the gate of nmos at the high frequency.
why it can't work as a startup circuit?when power on,C2 makes the gate of the NMOS to VDD,start up the circuit ?
 

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