library ieee;
use ieee.std_logic_1164.all;
entity LCD_Function is
port( clk : in std_logic;
e : out std_logic;
r_w : out std_logic;
rs : out std_logic;
data : out std_logic_vector(7 downto 0)
);
end LCD_Function;
architecture a of LCD_Function is
begin
process(clk)
variable count : integer range 0 to 31 := 0;
variable initial : std_logic := '0';
variable t_rs : std_logic := '0';
variable t_r_w : std_logic := '0';
variable t_e : std_logic := '0';
variable t_data : std_logic_vector(7 downto 0) := "00000000";
begin
if (clk'EVENT) and (clk = '1') then
if initial = '0' then
count:=count+1;
if count < 23 then initial := '0'; else initial := '1'; end if;
else
initial := '1';
end if;
end if;
case count is
--INITIAL SETTING
when 0 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '0';t_data := "00000000";
when 1 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '1';t_data := "00000000";
when 2 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '0';t_data := "00111000";
when 3 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '1';t_data := "00111000";
when 4 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '0';t_data := "00000110";
when 5 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '1';t_data := "00000110";
when 6 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '0';t_data := "00001111";
when 7 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '1';t_data := "00001111";
when 8 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '0';t_data := "00010100";
when 9 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '1';t_data := "00010100";
when 10 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '0';t_data := "00000001";
when 11 =>
initial := '0';t_rs := '0';t_r_w := '0';t_e := '1';t_data := "00000001";
--SEND Data TO DISPLAY "ASTRON LOGIC R&D"
when 12 => --A
initial := '0';t_rs := '1';t_r_w := '0';t_e := '0';t_data := "01000001";
when 13 => --Enable A
initial := '0';t_rs := '1';t_r_w := '0';t_e := '1';t_data := "01000001";
when 14 => --S
initial := '0';t_rs := '1';t_r_w := '0';t_e := '0';t_data := "01010011";
when 15 => --Enable S
initial := '0';t_rs := '1';t_r_w := '0';t_e := '1';t_data := "01010011";
when 16 => --T
initial := '0';t_rs := '1';t_r_w := '0';t_e := '0';t_data := "01010100";
when 17 => --Enable T
initial := '0';t_rs := '1';t_r_w := '0';t_e := '1';t_data := "01010100";
when 18 => --R
initial := '0';t_rs := '1';t_r_w := '0';t_e := '0';t_data := "01010010";
when 19 => --Enable R
initial := '0';t_rs := '1';t_r_w := '0';t_e := '1';t_data := "01010010";
when 20 => --O
initial := '0';t_rs := '1';t_r_w := '0';t_e := '0';t_data := "01001111";
when 21 => --Enable O
initial := '0';t_rs := '1';t_r_w := '0';t_e := '1';t_data := "01001111";
when 22 => --N
initial := '0';t_rs := '1';t_r_w := '0';t_e := '0';t_data := "01001110";
when 23 => --Enable N
initial := '0';t_rs := '1';t_r_w := '0';t_e := '1';t_data := "01001110";
when others =>
initial := '1';t_e := '0';
end case;
rs <= t_rs; r_w <= t_r_w; e <= t_e; data <= t_data;
end process;
end a;
