Why it needs a external pullup???

many MCU's P0 port need a external pullup resistor??
why??
the datasheet said it is P0 a open drain port.
what's a open drain(open collector) circuit ? and why it needs a external pullup?
thanks

Definition of Open-Drain
Open-drain refers to the drain terminal of a MOSFET transistor. (The analog for BJT devices is the open collector.) An open drain terminal is connected to ground in the low voltage (logic 0) state, but has high impediance in the logic 1 state. This prohibits current flow, but as a result, such a device requires an external pull-up resistor which is also connected to the positive voltage rail.

When a device is in the high-impediance state, the pull-up resistor keeps the line at logic 1. The line stays there until the device goes into the logic 0 state, and begins to sink current. This current flow creates a voltage drop across the pull-up resistor, and the line drops to the logic 0 voltage.

Click to expand...

Quoted from:
https://en.wikipedia.org/wiki/Open_drain

Regards,
IanP

Open drain is just like open collector. It is just that the drain (or collector) is left open ie nothing is attached to it so if the pin is used as an input pin and it is left unconnected it will go in the high impedence state. So external pullup resistors are necessary in case of open drain (Port 0 usually).

many MCU's P0 port need a external pullup resistor??
why??
the datasheet said it is P0 a open drain port.
what's a open drain(open collector) circuit ? and why it needs a external pullup?
thanks

Click to expand...

MCUs are designed to have a P0 or Port A designated for wire-and connection or current sinking operation, which requires open-drain in CMOS. This is to resemble open-collector that was used in many TTLs in the past between 60s to 80s, and some are still used today. Especially the case of Totem-pole which suffers current loading issues in wire-and connection, open-drain resolves this by offering high impedance, so if the port pin does not require to send any signal to the wire-and connection, it simply sets to high-impedance.

Wire-and connection is commonly used in wire-and buses such as I2C, PCI, VMEbus and etc for bus grant, SDL, and other handshaking or control signals.

An alternative to wire-and is Tri-State buffer, but open-drain is simple and cheap.

What?
Open-drain is a configuration usually used as output stage in many I/O interface. It uses an NMOS transistor, with its gate connected to the control signal for 1 or 0, its source connected to ground or VSS, and drain left unconnected called "open". This open-drain only gives two states, high impedance or hi-Z (when NMOS is turned off), and logic 0 (when NMOS is turned on).
To achieve logic 1, it requires an external pull-up resistor connected to the drain on one end, and to the VDD on the other end.
With pull-up, there is no high-impedance state. Instead, when NMOS is turned off, the current flows from VDD, through the pull-up resistor, then to the load on the opposite end of the line connection. The voltage at the node connected to the resistor and the drain of NMOS is close to VDD, thus giving a logic 1.

For example,

1. With pull-up, you get logic 1 and 0 at the output (node connected to the drain and resistor) depending you write 0 or 1 to the NMOS, respectively. If there is an inverter before the gate of NMOS, you write 1 or 0, respectively. If you want to sink current that flows from a VDD through the pull-up resistor and a LED. To achieve this, you set this port pin to be an input by writing to the Directional Data Register Control or DDRC. Usually it is set as input by default. Then write a logic 1 to this port pin to sink current. The transistor used in open-drain is usually a NMOS. If it has an inverter before it, write a logic 0 to the port pin instead.

I have ever tried using 100Ohm as the pullup for the AT89S52 but it never reach logic 0 because when i assign it as 0 it becomes about 2-3 Volt and the logic probe detect it as high.
So currently i am using 1k as the pullup and it works fine.
My question is...
Is the pullup must be 1K? because the minimum current for the MCS is about 20mA and i want to amplify it using less resistance.
Did i need another pullup for the i2c application if i have already internal pullup such PORT 1 or PORT2?

Best Regards

Rooftop said:

I have ever tried using 100Ohm as the pullup for the AT89S52 but it never reach logic 0 because when i assign it as 0 it becomes about 2-3 Volt and the logic probe detect it as high.
So currently i am using 1k as the pullup and it works fine.
My question is...
Is the pullup must be 1K? because the minimum current for the MCS is about 20mA and i want to amplify it using less resistance.
Did i need another pullup for the i2c application if i have already internal pullup such PORT 1 or PORT2?

Best Regards

Click to expand...

You can choose any resistance for your pullup depends on the suitable current for your application, and the max. current that micrcontroller can bear, I think for PIC it can sink up to 25mA, read the datasheet.

Regards,
Hani