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What are the efficient coding styles in Verilog/VHDL?

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p_shinde

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Coding style

hi,


can anyone upload or tell about Efficient coding styles in Verilog/VHDL

like which is better behavioral, structural.....?


thanks in advance.
Prasad
 

Re: Coding style

Hi,
please read this document. This is how a good RTL coding style should be.
 

Re: Coding style

sree205 said:
Hi,
please read this document. This is how a good RTL coding style should be.
Click to expand...



I have read the web link you take.They are all good papers,but i prefer the verilog.You can get some paper about coding style of verilog ?
 

Re: Coding style

The most of IC companies use verilog language.
The attached are some coding style of verilog for synthesis.
These are base for ic designer.

/David
 

Coding style

may be you can check some LEDA rule or nlint rule, will helpful
 

Coding style

Good coding style sometimes lead a successful design
 

Re: Coding style

Of course style is important.
But I think deep understanding of system architectures is critical for a successful design.
 

Coding style

alrite, instead of digressing from the topic, let me suggest something. the book reuse methodology manual is available in the forum. there is a whole topic devoted to rtl coding style. That should be sufficient.
 

Coding style

the book " Verilog Design Style Guide "
 

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