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How to do memory modeling in Verilog?

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ikru26

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Any one had slides or how to do Memory modeling in verilog..for example SDRAM,DDRAM.LILO and all...any good links are also welcome
 

Verilog--help

Hi

You may get the SDRAM and DDR model from the micron company website.
There are several models whose format are VHDL or verilog.

For example :
**broken link removed**

Serach Simulation Models
 

Re: Verilog--help

Check source models generated by Synopsys Mempro (outdated now).
I am sure you will learn a lot!
 

Verilog--help

xilinx also provide free memeory model
 

Re: Verilog--help

We used the micron SDRAM chip in our project a while ago.

This might help.
**broken link removed**


Also this is the data sheet for the part that we used.
**broken link removed**


Good Luck.
 

Verilog--help

Hope this is helpful to you.

**broken link removed**
 

Verilog--help

some software tools should provide those models, you can check those in your tools package.
 

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