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Transistor in cutoff in CTAT current reference

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deveshkm

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Hi,
I have designed CTAT current reference using inverse widlar current source.

I added CTAT and PTAT currents and used the new current source for biasing the amplifier.
The amplifier gives good results in a temperature range of -30 to 100 deg C

But, the biasing in CTAT was such that it made some transistors in cutoff mode.
Please comment on whether this is acceptable

While adding currents, the PTAT and CTAT current was mirrored to one MOSFET each and both the MOS were in parallel.
the sizes of each MOS was adjusted to reduce temp coefficient.
Temp co : 650 ppm/C
The sum of the currents flowed through to nmos cascode .
 

Run Monte Carlo to see how much worse your temperature coefficient with mismatch.
If it completes your specification (in PVT corners too) then don't worry.
Next time please post your schematic, it is hard to imagine from this description your circuit. "made some transistors in cutoff mode", I cannot make a decision by this.
 

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