HI-SPEED and RF LAYOUT

hello fellow layouters,

1. I just want to know what are key differences between implementing high speed layout techniques from RF layout techniques especially when dealing with lower nodes such as 16nm and below ?
2. Do you still implement common centroid technique here? if not anymore can someone explain if further?
3. Is shielding still necessary for these kind of applications? if not, how can we still take care of the integrity of the signals?

Thanks a million!

High speed generally refers to time domain and RF, to
frequency domain interests. In some cases these are
sides of the same coin, in others, not. Rarely does one
care about harmonics in high speed digital (other than
that you want enough of them passed, to get the
required edge rate). RF often demands that you create
none. But this has not so much to do with layout.

Common centroid addresses DC balance. If you are doing
differential RF, or if you set operating points by matching
in bias networks, then go ahead and take advantage of
the benefits. The main lineup is probably not caring about
DC match, more likely DC-blocked, in RF. High speed digital,
input offset (say, in a CML chain) can lead to delay
asymmetry and asymmetry can "stack up" along a logic chain
to eventually cause skew, setup/hold, etc. type failures.
You need to know the design care-abouts to say whether
layout cares too.