TPS54331 oversupply output no load voltage is not proper

[dhiraj.mahajan]

hii
i am using tps54331 regulate is input is 4.5 to 6V and i have required 3.3v constant to vary input voltage 4.5v to 6V or 6V but in no load not proper 3.3V is generate ...above given waveform for no load output ...plies surges me what is bug in design

[Palpurul]

Generally DC-DC converters require minimum load to work properly unless it's specifically designed to work under no-load condition.

[dhiraj.mahajan]

but I have 10mA lode then this is also same behavior ...but in datasheet is given lees than 1uA then this gon in shutdown mode

[Palpurul]

but I have 10mA lode then this is also same behavior ...but in datasheet is given lees than 1uA then this gon in shutdown mode

It's referring to the current consumption of the IC itself (Quiescent current) when you disable the converter from its EN (pin - 3). It is no referring to the load.

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[KlausST]

Hi,

* Do you have a proper PCB layout .. according datasheet recommendations, similar to the layout example?
A breadboard test will not give useful results.

Please do two tests:
* connect a 330 Ohms resistor to the output. (10 mA load) --> what is the result?
* disconnect L1 and C1 --> what is the result? (L1 and C1 form a undaped resonant. It´s likely that this causes some ringing which may confuse the regulation loop at low loads)
I personally don´t like those undaped LC circuits.

BTW: your uploaded schematic picture is of bad quality - impossible to reead all part values.

Klaus

[dhiraj.mahajan]

hii Klaus
in voltage 5V and lode resistor is 330E then output waveform is given and L1 and c1 is remove -

[KlausST]

Hi,

your schematic is still difficult to read.

C5 .. is it nF? it should be pF.

Klaus

[dhiraj.mahajan]

hii
FAF of Schematic

[FvM]

As KlausST mentioned, compensation network values are lightyears away from typical datasheet suggestions. How did you arrive at these values?

It's well possible that the inappropriate dimensioning causes the observed instability.

[E-design]

The application circuit in the data sheet seems to simulate well on 6 V with a high-value load resistance. It will go into a burst-mode of operation at light loads as shown.

You should use the recommended online app WEBENCH to test, tweak and finalize from your initial design values.

[dhiraj.mahajan]

hii
But i have required to vary input voltage 4.5V to 6V and output is 3.3V Constant on no lode ..then 6V is same but input voltage will be vary 5V then output voltage is given below waveform

[FvM]

Dimension the compensation network values according to design procedure described in the datasheet, try and come back.