Difference between Analog/Mixed Signal (Opamp, Data Converter) and RF/MMWave Layout

What is the fundamental difference, at a high level, between Analog/Mixed Signal (Opamp, Data Converter) and RF/MMWave Layout ?

Is if that RFIC/MMwave Layout needs shorter interconnect, devices closer to one another, less focus on matching, less noise and more isolation ?

But Analog/Mixed Signal Layout needs matching and isolation too ?

So fundamentally what is different about RFIC/MMWave layouts - is it the RF path and the losses of the paths and the short interconnect needed since it affects frequency response - using higher metals for routing since lowers capacitance to substrate ?

Any other differences ?

Thanks.

You should distinguish these two things first that are RFIC and mmWave Layouts.They are not 1:1 comparable techniques due to extremely high frequency.
While RFIC circuits which work upto few GHz use almost classical VLSI layout techniques, mmWave layouts are pretty similar to MMIC layout so they have to be definitely considered separate techniques.
RFIC circuits needs some symmetry and decoupling but they need also noteworthy matching.MMIC is another story..
There are many things to be taken into account but it's not possible to discuss all of them here..

Controlled (proper) impedance (return loss) and keeping
the RF energy confined to the structure (emissions loss,
EMI) are things you don't really worry about for baseband
analog design. Specialized routing forms (microstrip, strip
line, controlled impedance trace) and attention to tiny
details (like how a lonely via can radiate anomalously) are
key.

Hello,

Thanks Mr. Freebird and BigBoss,

@Dick_Freebird

Does this mean EM simulating the passives and interconnect and if the process allows it using process/PDK modeling transmission lines if possible for interconnect in the RF path as opposed to the DC path where you can use metal interconnect and not necessarily transmission lines modeled by the kits.

So, in a multistage amplifier then for an RF/mmWave design, maybe doing layout one stage at a time, EM simulating the necessary interconnect and passives and then moving stage by stage to see whether a portion of interconnect or passives along with the extracted transistor affect performance ? Are these good methodologies ?

@BigBoss,

I realize these are huge topics that cannot be discussed in just one message.

Just wanted to make the comment that for low frequency layouts, the EM, matching and parasitics of the interconnect to substrate matter not as much as in RF or MMwave layouts as much. You can use lower level metals it seems, whereas you might want to use higher level metals in high frequency design for interconnect to reduce frequency degradation caused by capacitive coupling to substrate.

Also isolation seems to play a larger role in higher speed circuits for reducing radiation and also substrate noise issues.

Just my general observations, wanted discuss the issues a bit, not get a full explanation which would be too vast.

In fact the layout techniques should be discussed in aspect of foundry/technology.Because every tech. has its own advantages/disadvantages.
Regarding to those design considerations, the layout should be examined.