[SOLVED] [Cadence Encounter] Connecting Macro Block pgpins

I am trying to connect a macro ROM module in encounter, but am struggling to get the vdd! and gnd! pins to connect properly. The problem is in connecting the pins to the global power/ground nets. I have placed the macro, then created power rings around it. I am then using the commands:

globalNetConnect gnd! -type pgpin -pin gnd! -inst * -all -override -verbose
globalNetConnect vdd! -type pgpin -pin vdd! -inst * -all -override -verbose

to try and tell sroute to connect them, but the nets do not get connected (verbose output says 0 nets connected) even though the pin names exist as above. On inspecting the pins themselves, the 'net' attribute of both the gnd! and vdd! pins is 'NIL', which I am unsure is right.

I fear that the problem may be in the macro definition itself, as I converted the library for it from cds format to OA in virtuoso. Viewing the cell in virtuoso shows the correct pin layouts and net naming, but when importing the OA lib for the macro, I get warnings including:

**WARN: (ENCTS-124): Timing library description of pin 'vdd!' is missing from cell 'dirom2048x32' in timing library 'dirom2048x32'.
**WARN: (ENCTS-124): Timing library description of pin 'gnd!' is missing from cell 'dirom2048x32' in timing library 'dirom2048x32'.

I wouldn't expect the timing lib to include the timing of power! But the fact encounter is looking for it isn't a good sign. I also get warnings saying:

**WARN: (ENCDB-2136): InOut term 'gnd!' of instance 'core_inst_rom_1_memory' does not connect to a '' net. The netlist is not correct or the net for connecting tie high/low signals is not specified. To resolve this problem, check your netlist or run globalNetConnect to specify the tie high/low signal nets.
**WARN: (ENCDB-2136): InOut term 'vdd!' of instance 'core_inst_rom_1_memory' does not connect to a '' net. The netlist is not correct or the net for connecting tie high/low signals is not specified. To resolve this problem, check your netlist or run globalNetConnect to specify the tie high/low signal nets.

I imagine something is not defined correctly in the macro OA? In virtuoso, the library contains the following views:



I am unsure of the difference between abstract and abstract_mlvs, however in the abstract view I can see all the pins, with the correct sizing and inspecting the nets can see that they are all correct. abstract_mlvs also shows the pins, but the nets are not present (not sure if this is to be expected in this view).

Example virtuoso abstract view:


Example virtuoso abstract_mlvs view:


Encounter Macro View:


Encounter Macro Pin:


Any help or ideas would be much appreciated!

I have seen this problem with LEF files before, it is the pin class that is wrong for sure. It is not a pgpin, it is defined as signal right now.

I don't use OA (no one really does), so I can't help much with fixing that.

Hmm ok. The LEF provided with the macro does appear to be annotated correctly (USE power/ground on the vdd! and gnd! pins), but I the lib could be different. Unfortunately the technology libraries I have available are all OA based, and as far as I have been able to work out it isnt possible to mix LEF files with OA libs? Is it possible to edit the pin classes in Virtuoso instead?

Thanks for your help

Resolved by creating a new lib in virtuoso and importing the LEF instead of converting the existing library. Thanks for your help ThisIsNotSam!