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Added SMTP TLS/SSL and SRAM dumped in STM32F407xx, pin-to-pin upgrade suggest. crypto

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ogulcan123

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Hi all,

I'm using STM32F407VGT6 MCU with LQFP-100 package.

After I implemented the SMTP client application to my project, I started getting the errors below (the list is normally longer):

...
...
E4-v1-SW\E4-v1-SW.axf: Error: L6406E: No space in execution regions with .ANY selector matching tcp.o(.data).
E4-v1-SW\E4-v1-SW.axf: Error: L6406E: No space in execution regions with .ANY selector matching ip.o(.data).
E4-v1-SW\E4-v1-SW.axf: Error: L6407E: Sections of aggregate size 0x4ab8 bytes could not fit into .ANY selector(s).
...





So, I think it's time for me to upgrade my MCU to a higher SRAM, doing so, I'd rather choose an MCU of fully pin-to-pin compatible with STM32F407xx. Right now, I'm considering STM32F439xx.

However, I cannot be sure if such an upgrade will be sufficient enough. I don't know whether my new library support of SMTP (Cyclone TCP) uses HW crypto for RNG(random number generator) or such to save from SRAM and CPU cycles. If it does, I will be more confident that the upgrade will be sufficient.

Any ideas and tips are appreciated.

Thanks,
Ogulcan
 

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