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Understanding sigma delta ADC

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Chinmaye

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Hello everyone,

I have a basic doubt in Sigma Delta ADC's. All the books say that the higher the number of cycles that we consider at the output, the accuracy of it is better.
Lets say the input is varying between +0.5V and -0.5V and the quantizer gives an output of either 0.5 or -0.5. Assuming zero initial conditions, if the input is 0.2 volts, then we get the correct output from quantizer in 10cycles. If the input is 0.3, then we get the correct output from quantizer in 5 cycles. If the input is 2.5, then we get the correct output from quantizer in 4 cycles. If the input is 0.275, then we get the an output close to input in about 9 cycles.
So, ideally after how many cycles should the output from quantizer be averaged?
 

Sir/Madam,
Doesn't it depend on
a.what is the accuracy with which the output is required and
b. input values.
 

Hi Chinmaye,
I would try to explain more. Now assume you have an audio signal which is 20 kHz bandwidth and the basic Nyquist rate is 48 kHz (a typical value used in audio slightly higher than double the bandwidth). Now a ver y rough estimation of a second order sigma delta converter is 2.5bits for every doubling of the sampling rate. Let us say you use over sampling ratio (OSR) = 64 (fs= 64 * 48 kHz = 3.072 MHz). Now your SNDR (signal to noise dynamic range) for a second order loop filter = log (base 2) (64) * 2.5 b= 6 * 2.5b = 15 bits
Your converter should provide a 15-bit output every 64 cycles (each cycle = 1/(3.072 MHz))
So the number of the cycles depend on your OSR while the number of output bits depends on SNDR which is a function of loop order and number of bits in quantizer (in case of multi bit quantization).
 

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